Monday, February 22, 2016

Releasing version 1.2.0

Finally got around to releasing the next version of the simulator. Only a minor change in the nodal analysis.

Will post the next case study of two inverters connected together - one working in voltage control mode and the other in current control mode.

Tuesday, February 16, 2016

Solver issues

After the last test case of an inverter with LC filter in voltage control mode, I have tried to simulate two inverters connected together - one in voltage control mode and the other in current control mode. To further complicate the system, the dc bus of the inverter in current control mode is formed by a three phase diode rectifier fed by a three phase ac source.

There have been strange glitches in the waveform that I could get rid off when I simulated the system at 100 nanoseconds. But then I felt that was way too demanding of such a system which should need 1 or 2 microseconds or maybe even more since both converters are switching at 5 kHz.

My first suspect was of the loop currents and felt that since the loops were being chosen randomly, they need to be rearranged to ensure that the d/dt of the ODEs were minimal. Several iterations and trials later, no change.

So the next suspect was the nodal analysis. Turns out this was the culprit. The main problem with nodal analysis is that impedances are vastly different. A diode when turned on has a resistance of 0.01 ohm while another diode that is off has a resistance of 100 megaohm. So the admittance matrix has elements that have a factor of 1e+10. This makes it prone to error.

One of the reasons for error turns out to be the nodal analysis that occurs after determining freewheeling operation. Apparently this one is particularly the case when an inductor is treated as a resistance when it has negligible current. By removing the check, the problem disappeared. That is an inductor is always treated as a current source in the nodal analysis immediately following freewheeling action.

The simulation is finally working with almost negligible glitches. Need to investigate the above effect a little more before I release the next version and post the next case. Hopefully by the end of the week.

Progress is going slow. But the good news is I have now moved on to multi-inverter systems. Hopefully, the next will be microgrids and renewable energy integration.

Sunday, January 24, 2016

Three phase inverter with LC filter

I posted the next test case of an inverter with LC filter on my website:

Also, I started a Facebook page for the project:

Wednesday, January 20, 2016

Releasing version 1.1.0

Been a long time. Have been fighting with a lot of bug fixes and most importantly figured out a way to make the simulator run faster. It is now approximately 6 times faster.

The download link is from my website:

I'll post the next text case which will be a three phase inverter with LC filter tomorrow.

Wednesday, December 23, 2015

Making the simulator faster

I was almost ready releasing the next version of the circuit simulator. The only drawback with this version has been that it is a bit slow. Reasons for this are the repeated loop manipulations that are being performed - restricting the stiff loops, computing the loop currents every time there is a switch turning on or off etc.

The past couple of days I tried a nodal analysis approach in comparison with the previous loop analysis approach. I didn't find much improvement in the speed of simulation. However, the matrices are much more unstable and the simulation time step needs to be much smaller. There probably are improvements I could have made to reduce this instability, but I would rather go with the loop analysis method.

To speed up the simulations with loop analysis, the only method I can think of is to maintain a logbook of all the changes taking place in the circuit and how this impacts the loops. This is under the assumption that there will be a finite number of changes possible and therefore a lookup table can be used to get rid of all the loop manipulations. So the simulation will be slow in the beginning but will speed up later.

Anyway, I am taking a break for the next four days to hang out with friends who are beginning to wonder if I am still alive. Seasons greetings to those who celebrate Christmas and for those who don't (and that includes me) get drunk and be merry anyway. See you before new year when I hope I will release my next version.

Saturday, December 19, 2015

Diode state determination

Diodes and switches are high value resistances when off and low value resistances when on. The way of detecting when the turn on is to measure the voltage across them at every simulation cycle and change their status when the forward voltage exceeds 1 Volt. For a device in off state this might mean a current of 0.5 microAmps.

When running the simulation of a three-phase inverter, I found that the diodes were trying to turn on at every simulation instant even though the switch across them was conduction. On the contrary, the diodes that were across switches that were on and conducting was significantly higher and therefore were turning on.

To describe this look at this switch/diode combination when the switch is on.

The switch is a part of a loop with a current i1. The diode is off and forms a loop with the switch. By mere observation, it is clear that because of its association with i1, i2 will be large enough for the diode to turn on. There is absolutely nothing wrong with the loop, but the result is blatantly wrong.

This leads me to think about why do I need to use loop analysis to determine the current though stiff elements? The loop i2 could be written in several different ways. If it is written with respect to the dc bus voltage, it would result in a reverse current that would keep the diode off.

The same goes for any stiff element. By making an element stiff, it ensures that it will not disrupt the currents in the circuit. So the effect of the diode can be removed by making it a high resistance. But if the current through the diode matters and in this case it does, loop analysis is not an accurate way to determine the current through the diode.

Since nodal analysis is available and is being used to determine freewheeling, why not use it to determine the current through all stiff elements after the loop analysis ODE is solved.

Here is the code:

Excessive loops

I started working on the case of a three-phase inverter feeding an inductor-capacitor filter with the objective for designing a controller to regulate the voltage across the capacitor. In a nutshell simulate a UPS.

I ran into a number of problems which will be separate posts. I am still not sure if these problems have been completely solved.

The first problem. On simulating in open loop i.e giving balanced sine wave modulating signals I expected smooth balanced current and voltage waveforms. Instead all were badly distorted. The reason was that the circuit has 48 branches and 32 nodes but the number of loops calculated was 20. This isn't so bad because the loop finder works in random ways and could end up with extra loops. The assumption was that these extra loops would be linear combinations of the other loops and would be eliminated by loop manipulations. However, on looking at the system matrices in the differential equations I found 18 loops. So one loop was extra and solving this loop messed up the simulation.

So why did this loop linger? The loop manipulations are done only for stiff loops. This is to restrict stiff branches to the minimum number of loops. But if there are excess loops that are nonstiff to begin with, they may never be eliminated. So, to make sure that the loops are exact, on forming the system loops for the first time, row operations are performed to convert them to an upper triangular form. This will ensure that loops that are linear combinations are eliminated at the beginning of the simulation.

Here's the code: